MST helps extend planar roadmap

In my previous blog post, I highlighted one of the benefits of MST® for engineering channel doping profiles. In that application, the goal was to keep dopants away from the surface region where (inversion) on-state conduction occurs while maintaining higher doping below that to maintain control of the channel conduction and reduce off-state leakage.

 

In CMOS devices, current is fed into and out of the surface inversion region by doped source and drain regions with the opposite polarity of dopants to the channel. In modern planar devices the connection to the channel from source and drain is made by shallow extension regions, of the same polarity as the source and drain, which extend underneath the edge of the gate.

 

One of the challenges of scaling planar devices to smaller dimensions is to scale down the depth of the extension (it is important to scale all the device dimensions, not just the gate length) while at the same time not adding too much overall resistance.

 

To illustrate the severity of the problem – at the 28nm node about half of the of the overall device resistance comes from the contacts to the channel. While MST can be used to improve the channel mobility and so reduce the channel contribution to resistance (we have demonstrated more than 50% improvement in peak mobility), half of that benefit is thrown away at 28nm by the resistance to the source and drain.

 

This is where clever engineering can reap benefits. In a series of two papers with authors from UC Berkeley, Robin Zhang and Prof. Tsu-Jae King, the Atomera team has been able to demonstrate some remarkable features for engineering source-drain junctions. The paper is co-authored with Lenny Rubin from Axcelis Technologies, which specializes in ion-implantation equipment for semiconductor doping.

 

First, it turns out that much shallower junctions can be made by using MST oxygen layers as a kind of retaining wall to keep the extension dopants near the surface where they are needed. It’s like the opposite of the channel engineering profile I wrote about previously – instead of keeping the channel dopants from diffusing up to the surface, we can also keep the extension dopants near the surface. And all with the same design of MST film! These results were published in the Journal of Applied Physics.

 

Now, engineering a shallower junction is good, but not enough in itself. For the same doping level, a shallower junction would introduce more resistance because the resistance scales with the inverse product of width and depth or the cross-sectional area seen by the current.  Wider or deeper contacts give more paths for the electrons to flow and so reduce the resistance; if the same width contact is made more shallow, the resistance is increased.

 

For this reason, a figure of merit is the product of the junction depth and the (sheet) resistance. Reducing the junction depth and increasing the resistance would cancel the benefit: we need to both reduce the junction depth and reduce resistance.

 

In a recent paper, the same UC Berkeley, Axcelis and Atomera team were able to show by careful experimentation that MST can be used to reduce the product of junction depth and sheet resistance, by 30% or more, and for each of the major dopants used in semiconductor processing, Boron, Phosphorus and Arsenic! . This work has many applications but is particularly promising as people scale down planar devices from 28nm to 20nm and beyond.